Product Summary

The GL850G is Genesys Logic’s USB 2.0 Low-Power HUB Controller which fully comply with Universal Serial Bus Specification Revision 2.0. The GL850G embeds an 8-bit RISC processor to manipulate the control/status registers and respond to the requests from USB host. Firmware of GL850G will control its general purpose I/O (GPIO) to access the external EEPROM and then respond to the host the customized PID and VID configured in the external EEPROM. Default settings in the internal mask ROM is responded to the host without having external EEROM. GL850G is designed for customers with much flexibility. The more complicated settings such as PID, VID, and number of downstream ports settings are easily achieved by programming the external EEPROM (Ref. to Chapter 5).

Parametrics

GL850G absolute maximum ratings: (1)5V Power Supply: -0.5 to +6.0 V; (2)3.3V Power Supply: -0.5 to +3.6 V; (3)Input Voltage for digital I/O pins: -0.5 to +3.6 V; (4)Open-drain input pins(Ovcur1~4#,Pself,Reset): -0.5 to +5.5 V; (5)Input Voltage for USB signal (DP, DM) pins: -0.5 to +3.6 V; (6)Storage Temperature under bias: -55 to +100 ℃; (7)Frequency: 12 MHz ± 0.05%.

Features

GL850G features: (1)Integrate USB 2.0 transceiver; (2)Each downstream port supports two-color status indicator, with automatic and manual modes compliant to USB specification Revision 2.0; (3)Built-in upstream 1.5KΩ pull-up and downstream 15KΩ pull-down; (4)Embed serial resister for USB signals; (5)Support both individual and gang modes of power management and over-current detection for downstream ports; (6)Conform to bus power requirements; (7)Automatic switching between self-powered and bus-powered modes; (8)Support compound-device (non-removable in downstream ports) by I/O pin configuration; (9)Configurable non-removable device support; (10)PLL embedded with external 12 MHz crystal.

Diagrams

GL850G block diagram

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GL850G
GL850G

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GL850
GL850

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GL850A
GL850A

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GL850G
GL850G

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GL852
GL852

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